Thin layer semi-conductor structure comprising a heat distribution layer

ABSTRACT

The invention concerns a thin layer semi-conductor structure including a semi-conductor surface layer ( 2 ) separated from a support substrate ( 1 ) by an intermediate zone ( 3 ), the intermediate zone ( 3 ) being a multi-layer electrically insulating the semi-conductor surface layer from the support substrate. The intermediate zone has a considered sufficiently good electrical quality of interface with the semi-conductor surface layer and includes at least one first layer, of satisfactory thermal conductivity to provide a considered as correct operation of the electronic device or devices which are to be elaborated from the semi-conductor surface layer ( 2 ), the intermediate zone including additionally a second insulating layer of low dielectric constant, located between the first layer and the support substrate.

TECHNICAL FIELD

[0001] The present invention concerns a thin layer semi-conductorstructure and processes for embodying such a structure.

[0002] By thin layer semi-conductor structure is understood a structurehaving on the surface a fine semi-conductor layer in which will bemanufactured electronic devices (this layer is called an active layer)and a substrate performing a mechanical support role. This substrate isgenerally electrically insulated form the surface layer. The substrateis constituted either from a solid insulating material (a dielectric inthe case of the SOS), or from a conductor or semi-conductor material. Inthis latter case, it may be of the same material as that of the surfacelayer (the case of SOI), generally insulated form the surface layer byan insulation layer. In the case of the SOI, the mechanical substrate isusually constituted by a silicon substrate with a layer of silica on thesurface, but it may also be constituted by a solid substrate of fusedsilica (silicon on quartz). Other thin layer semi-conductor structuresare also known like the AsGa on silicon, the SiC on silicon or the GaNon sapphire etc. These structures are made either by technologies knownas “Wafer Bonding”, or by heteroepitaxy.

STATE OF THE PRIOR ART

[0003] Thin layer semi-conductor structures like for example SOIstructures are increasingly used to make electronic devices. SOIstructures are used in particular to manufacture VLSI logic and analoguecircuits or to manufacture power components. An SOI structure (orsubstrate) has several advantages relative to a solid silicon substrate.One of these advantages is that the insulant subjacent to the siliconlayer makes it possible to reduce the stray capacitance of deviceselaborated in the silicon layer, and all the more so the thicker thisinsulant is.

[0004] A now conventional process for making an SOI substrate is theSIMOX (Separation by IMplanted OXygen) process. According to thisprocess, the insulant is a buried silicon oxide SiO₂ layer obtained byuniform implantation of oxygen in a silicon substrate. This technologyis now being challenged by other processes of the type known as “WaferBonding” in the English-speaking world, (and which will be denotedhereinafter by the term molecular adhesion), for example the BSOIprocess (described by J. HAISMA et al., in Jap. J. Appl. Phys., vol. 28,page L 725, 1989) or the UNIBOND process (described by M. BRUEL inElectron. Lett., vol. 31, page 1201, 1995).

[0005] SIMOX technology is still widely used. It is based on animplantation of a very high dose of oxygen. It allows the manufacture ofburied layers of silicon only for thicknesses of between 100 and 400 nm.The major drawback of this technology is its cost due to the high doseion implantation, and the need to resort to non standardmicro-electronic equipment. Technologies of the molecular adhesion typedo not have this drawback and make it possible additionally, inprinciple, to modulate the thicknesses of layers and the nature of thematerial constituting the insulant. The UNIBOND process additionallymakes possible a lower cost and a better homogeneity of the siliconlayer.

[0006] All current SOI substrates use the amorphous silica SiO2 as thebase material for the buried insulating layer. This material is a goodinsulant, is easy to manufacture and gives very good interfaces with thesilicon since it has few fixed charges and interface states. It hasmoreover a low dielectric constant, which is a favourable factor for therapidity of the components because of the reduction in stray capacitance

[0007] Silica has however one great drawback: its very low thermalconductivity which is of the order of 0.2 W.m⁻¹.K⁻¹. This causes asubstantial transitory and localised temperature rise, altogetherproblematic for the proper operation of the components. One way ofreducing this rise in temperature is to reduce the thickness of theburied silica layer. However, the drawbacks of this reduction inthickness are that on the one hand stray capacitance is increased(thereby reducing the rapidity of the components) and, on the otherhand, electrical strength is reduced. Furthermore, the reduction inthickness of the insulating layer is not easy to obtain in theimplementation of processes of the molecular adhesion type where a goodquality of adhesion is obtained much more easily with layers ofthickness exceeding 300 nm.

[0008] The idea has therefore been conceived of replacing the silica byanother insulating material having better thermal conductivity.Reference may be made on this subject to the documents EP-A-0 707 338,EP-A-0 570 321, EP-A-0 317 445 and WO-A-91/11822. The materials proposed(for example diamond) do not have a good interface with silicon from theelectrical point of view. For this reason, a thin layer of silica isadded so as to achieve the interface with the surface silicon. Thesesolutions are certainly effective from the thermal point of view, butthey are not easily applicable in association with the technologies ofbonding by molecular adhesion. It is indeed extremely difficult to bondmaterials of high thermal conductivity as conceived.

[0009] There are also structures of the SiC type on silicon or AsGa onsilicon with generally an intermediate insulating layer. Thesestructures are often used to make super high frequency power components.Because of this, heat dissipation in the component is substantial andthe thermal conductivity of the silicon and/or of the dielectrics usedis insufficient to provide a junction temperature which is notcrippling.

DISCLOSURE OF THE INVENTION

[0010] To overcome this problem, there is proposed, according to thepresent invention, a thin layer semi-conductor structure having severallayers between the semi-conductor surface layer, from which theelectronic components will be elaborated, and the support substrate soas to decouple the functions of thermal conductivity and electricalinsulation. This decoupling makes it possible to optimise, through achoice of appropriate materials these two functions, it being wellunderstood that these materials must also allow a good interface quality(mechanical strength). The material in contact with the semi-conductorlayer must additionally have a good quality electrical interface. Thus,the layer in contact with the semi-conductor surface layer may be madeby means of an insulating layer offering good electrical insulation anda good electrical interface quality. A layer of a material havingthermal conductivity is used to overcome the problem of temperature riseproduced by the electronic components. Another layer may be used toprovide the quality connection with the support substrate if the layerof good thermal conductivity does not allow it. It may be of low thermalconductivity. If this layer is insulating, its role may also be tomaintain sufficient thickness of insulant of low permittivity under thesemi-conductor surface layer in order to retain low stray capacitancefor the electronic components and to allow ease of bonding when usingmolecular adhesion technology.

[0011] An object of the invention is therefore a thin layersemi-conductor structure including a semi-conductor surface layerseparated from a support substrate by an intermediate zone, theintermediate zone being a multi-layer electrically insulating thesemi-conductor surface layer from the support substrate, having anelectrical quality of interface considered as sufficiently good with thesemi-conductor surface layer and including at least one first layer, ofsatisfactory thermal conductivity to provide an operation considered ascorrect of the electronic device or devices which are to be elaboratedfrom the semi-conductor surface layer, characterised in that theintermediate zone additionally includes a second insulating layer of lowdielectric constant, located between the first layer and the supportsubstrate.

[0012] Advantageously, the thickness of the first layer is selected as afunction of the dimension of the zones of heat dissipation of theelectronic devices. By way of example, as thickness for the first layerwill be chosen advantageously a thickness which is of the same order ofmagnitude or greater than the dimension of the largest zone of thermaldissipation. In the event of a third layer being used, it must be asthin as possible so as to optimise the role of the first layer.

[0013] The second layer must be able to provide adhesion considered assatisfactory between the intermediate zone and the support substrate. Bygood adhesion is understood a mechanical adhesion with as fewmacroscopic defects (i.e. localised adhesion failures) as possible.

[0014] The intermediate zone may include a third layer, insulatingbetween the first layer and the semi-conductor surface layer, said thirdlayer conferring on the intermediate zone said electrical quality ofinterface. If the semi-conductor structure is an SOI structure, thethird layer is advantageously a layer of silicon oxide obtained forexample by thermal oxidation.

[0015] If the semi-conductor structure is an SOI structure, the secondlayer may be a layer of silicon oxide.

[0016] The first layer is able not to be insulating. Its thickness isadjusted as a function of the heat generation zones in thesemi-conductor layer. It may particularly be multi-layer.

[0017] More exactly, for the layer of good thermal conductivity to playits role effectively in diffusing the heat generated in the components,its thickness will have to be sufficient. Conversely, the thickness ofpossible intermediate layers of relatively low thermal conductivitybetween this layer and the semi-conductor layer will have to beminimised. In practice, the respective thicknesses of these layersnecessary for good thermal operation will depend on the size of thecomponents and on their operation (size of the thermal dissipationzones) and on the thermal conductivities of the different materials(semi-conductor layer, dissipating layer, sub-layers and substrate). Thefirst layer may be constituted by a material chosen from amongpolycrystalline silicon, diamond, alumina, silicon nitride, aluminiumnitride, boron nitride, silicon carbide.

[0018] The first layer may be in contact with- the semi-conductorsurface layer and be able to confer said electrical interface quality.The semi-conductor structure being an SOI structure, the first layer maybe a layer of cubic silicon carbide.

[0019] Advantageously, the second layer of the intermediate zone hassufficient thickness of insulant of low dielectric constant for thestray capacitance present between the semi-conductor surface layer andthe support substrate to be sufficiently low to provide a considered ascorrect operation of the electronic device or devices which are to beelaborated from the semi-conductor surface layer.

[0020] A further object of the invention is a process for manufacturinga semi-conductor structure as defined above, characterised in that itincludes the following stages:

[0021] manufacture of the layers of the intermediate zone on one face ofa first substrate intended to supply said semi-conductor surface layerand/or on one face of a second substrate intended to supply the supportsubstrate of the structure,

[0022] bonding of the first substrate on the second substrate, saidfaces being placed opposite each other,

[0023] making of said semi-conductor surface layer.

[0024] Making said semi-conductor surface layer may include reducing thethickness of the first substrate.

[0025] Bonding the first substrate onto the second substrate may beachieved by molecular adhesion. In this case, the manufacturing stage ofthe layers of the intermediate zone may include the deposition of atleast one bonding layer to allow bonding by molecular adhesion.Advantageously, said bonding layer is a silicon oxide layer.

[0026] The first layer may be a layer of a material chosen from amongpolycrystalline silicon deposited by LPCVD, diamond deposited by PECVD,alumina deposited by reactive cathode sputtering, silicon nitridedeposited by CVD, aluminium nitride deposited by CVD, boron nitridedeposited by CVD and silicon carbide deposited by CVD.

[0027] The reduction in the thickness of the first substrate may beobtained by using one or more technologies from among: rectification,chemical attack, polishing, separation following thermal treatment alonga cleavage plane induced by ion implantation.

BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The invention will be better understood and other advantages andparticularities will emerge from reading the following description,given as a non-restrictive example, accompanied by the appended figuresamong which:

[0029]FIG. 1 shows, in a transverse view, a semi-conductor structurewith a heat distribution layer according to the present invention,

[0030]FIGS. 2A to 2D show different stages of a first embodiment processof a semi-conductor structure according to the present invention,

[0031]FIGS. 3A and 3B show different stages of a second embodimentprocess of a semi-conductor structure according to the presentinvention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0032]FIG. 1 shows a first example of a semi-conductor structureaccording to the invention. This structure comprises a support substrate1 for example of silicon, a surface layer 2 of silicon and anintermediate zone 3. The intermediate zone 3 comprises at least onelayer 4 of good thermal conductivity, an insulating layer 5 conferringgood electrical quality of interface with the semi-conductor surfacelayer 2 and an insulating layer 6, being able to be of low thermalconductivity, adhering to the support substrate 1.

[0033] In the case of an SOI structure implementing the molecularadhesion process, the layer 6 may in particular be made of silica. Thislayer 6 may of course be a multi-layer.

[0034] When the layer 4 of good thermal conductivity makes it possibleto have directly a good electrical interface with the surface layer ofsilicon 2, the layer 5 may be omitted.

[0035] The structure according to the invention makes it possible toretain the materials and thicknesses allowing both ease of manufactureand good operation of the electronic devices which will be made on or inthe semi-conductor surface layer.

[0036] The layer 4 (or the layers 4) acts as a heat distributor andmakes it possible to reduce the rise in temperature in the heat emittingdevice while making it possible to retain the subjacent layer or layersof low thermal conductivity and of relatively pronounced thickness.

[0037] The insulating layer 5 may also be an insulating multi-layer.

[0038] The advantage of the invention from the thermal point of view maybe shown by means of the following example relative to an SOI structure.A localised temperature rise is pre-supposed of 0.2 μm diameter,corresponding to approximately the temperature rise created by anadvanced generation transistor. The resultant temperature rise has beencalculated by fixing the nature (silica) and thickness of the materialsof the layers 5 and 6 (respectively 0.1 and 0.3 μm) and the nature andthickness of the layer 4 have been varied. To this end a very simplemodel has been used, assimilating the structure to a hemisphericstructure. It is noted that the addition of a distribution layer 4 ofmoderate thickness (of the order of the dimension of the electronicdevice) manufactured in miscellaneous materials of thermalconductivities, which are different but nonetheless always greater thanthose of the silica, makes it possible to approach quite quickly thetemperature rise corresponding to the presence of the single layer ofsilica 5 of 0.1 μm thickness.

[0039] From the point of view of rapidity of the electronic device, itis advantageous to choose for the layer 4 a material which is insulatingand if possible of low dielectric constant. This makes it possible infact to reduce dielectric capacities and losses.

[0040] A first process for manufacturing a semi-conductor structureaccording to the present invention will now be described in relation toFIGS. 2A to 2D.

[0041]FIG. 2A shows a first substrate 10 for example of silicon or ofSiC on one face of which has been manufactured a layer 15 of aninsulating material having with the substrate 10 an electrical interfacequality considered as sufficiently good. Preferably, the layer 15 is alayer of silica obtained by thermal oxidation. Onto the layer 15 is thendeposited a layer 14 having satisfactory thermal conductivity. Among thematerials able to be used may be cited polycrystalline silicon depositedby LPCVD, diamond deposited by PECVD, alumina deposited by reactivecathode sputtering from an aluminium target, silicon nitride, aluminiumnitride, and boron nitride deposited by CVD and SiC deposited by CVD. Ona layer 14 may possibly be deposited an insulating layer 16′ which alsofacilitates bonding, preferably a layer of silica deposited for exampleby CVD, except if the layer 14 allows direct bonding with a secondsubstrate 11.

[0042] The silicon substrate 10 has a layer 17 of micro-cavitiesarranged parallel to the face of the substrate on which the insulatinglayers 15, 14 and 16′ have been obtained. This layer of micro-cavities17 delimits in the substrate 10 a layer 12 intended to become thesemi-conductor surface layer of the structure. The micro-cavities havebeen obtained by ion implantation of hydrogen in the conditionsdescribed in the document FR-A-2 681 472 so as to obtain a separationinto two parts of the substrate 10 along a cleavage plane duringsubsequent thermal treatment. The ion implantation operation may becarried out before or after the insulating layers 15, 14 and 16′ areobtained or between the deposition of one of these layers and thedeposition of another layer.

[0043]FIG. 2B shows a second substrate 11 for example of silicon,serving as a support substrate, on one face of which has beenmanufactured a bonding layer 16″. This bonding layer is preferably asilica layer made by thermal oxidation. It is only necessary if thenature of the substrate 11 does not allow direct bonding with the layer16′.

[0044]FIG. 2C shows the bonding stage, by molecular adhesion, of the twosubstrates by bringing into contact the free and prepared faces of thebonding layers 16′ and 16″.

[0045] Appropriate thermal treatment (see the document FR-A-2 681 472)then makes it possible to obtain the separation into two parts of thesubstrate 10 along the layer of micro-cavities 17. The structure is thenobtained which is shown in FIG. 2D, which is an SOI structure includinga support substrate 11 and a surface layer 12 of silicon separated by anintermediate zone 13. The zone 13 includes an electrical interface layer15, a layer 14 of sufficient thermal conductivity and a bi-layer 16(formed of the layers 16′ and 16″ of silica) providing good adhesionwith the substrate 11.

[0046] The free face of the surface layer 12 may then be conditioned bypolishing and cleaning.

[0047] A second process for manufacturing a semi-conductor structureaccording to the present invention will now be described in relation toFIGS. 3A and 3B.

[0048]FIG. 3A shows a first substrate 20 for example of silicon on oneface of which has been made, for example by epitaxy, a material of goodthermal conductivity so as to obtain a corresponding layer 24. Theepitaxial material may be cubic silicon carbide elaborated according toknown techniques. On the layer 24 is then deposited an insulating layer26, for example a layer of silica.

[0049] As previously the silicon substrate 20 has a layer 27 ofmicro-cavities arranged parallel to the face of the substrate on whichthe insulating layers 24 and 26 have been deposited. This layer ofmicro-cavities 27 delimits in the substrate 20 a layer 22 intended tobecome the semi-conductor surface layer of the SOI structure. Aspreviously, the layer 27 of micro-cavities has been made in theconditions described in the document FR-A-2 681 472.

[0050] A second substrate 21 for example of silicon, serving as asupport substrate, has been prepared.

[0051] The two substrates are then bonded, by molecular adhesion, bybringing into contact the free face of the layer 26 (see FIG. 3A) with afree face of the substrate 21. The result obtained is shown in FIG. 3B.

[0052] An appropriate thermal treatment stage then makes it possible toobtain the separation into two parts of the substrate 20 along the layerof micro-cavities 27.

[0053] In this embodiment example, it is advantageous to achieve the ionimplantation stage after the epitaxy of the insulating layer 24. Indeed,the ion implantation of hydrogen in the silicon carbide, when thismaterial is used, makes the latter perfectly insulating. This makes itpossible to obtain an SOI structure of the requisite quality.

[0054] It is also noted that, in this embodiment example, there is noparticular layer for obtaining the electrical interface with the siliconsurface layer. Indeed, the layer 24 of good thermal conductivity beingobtained by epitaxy, the interface with the semi-conductor surface layeris a priori of satisfactory electrical quality.

1. A thin layer semi-conductor structure including a semi-conductorsurface layer (2, 12, 22) separated from a support substrate (1, 11, 21)by an intermediate zone (3, 13, 33), the intermediate zone (3, 13, 33)being a multi-layer electrically insulating the semi-conductor surfacelayer from the support substrate, having a considered sufficiently goodelectrical quality of interface with the semi-conductor surface layerand including at least one first layer, -of satisfactory thermalconductivity to provide a considered as correct operation of theelectronic device or devices which are to be elaborated from thesemi-conductor surface layer (2, 12, 22), characterised in that theintermediate zone includes additionally a second insulating layer of lowdielectric constant, located between the first layer and the supportsubstrate.
 2. A semi-conductor structure according to claim 1,characterised in that the thickness of the first layer is selected as afunction of the dimension of the zones of heat dissipation of theelectronic devices.
 3. A semi-conductor structure according to claim 1,characterised in that the second layer is able to provide adhesionconsidered as satisfactory between the intermediate zone and the supportsubstrate.
 4. A semi-conductor structure according to claim 1,characterised in that the intermediate zone (3, 13) includes a third,insulating, layer (5, 15) between the first layer and the semi-conductorsurface layer (2, 12), said third layer conferring on the intermediatezone said electrical quality of interface.
 5. A semi-conductor structureaccording to claim 4, characterised in that, the semi-conductorstructure being an SOI structure, the third layer (5, 15) is a layer ofsilicon oxide.
 6. A semi-conductor structure according to claim 5,characterised in that the third layer (5, 15) is a layer of siliconoxide obtained for example by thermal oxidation.
 7. A semi-conductorstructure according to any one of claims 1 to 6, the structure being anSOI structure, characterised in that the second layer (6, 16) is a layerof silicon oxide.
 8. A semi-conductor structure according to any one ofclaims 1 to 7, characterised in that the first layer (4, 14) isconstituted by a material chosen from among polycrystalline silicon,diamond, alumina, silicon nitride, aluminium nitride, boron nitride,silicon carbide.
 9. A semi-conductor structure according to claim 1,characterised in that the first layer (24) is in contact with thesemi-conductor surface layer (22) and is able to confer said electricalquality of interface.
 10. A semi-conductor structure according to claim9, characterised in that, the semi-conductor structure being an SOIstructure, said first layer (24) is a layer of cubic silicon carbide.11. A semi-conductor structure according to any one of claims 1 to 10,characterised in that the second layer of the intermediate zone hassufficient thickness of insulant of low dielectric constant for thestray capacitance present between the semi-conductor surface layer (2,12, 22) and the support substrate (1, 11, 21) to be sufficiently low toprovide a considered as correct operation of the electronic device ordevices which are to be elaborated from the semi-conductor surface layer(2, 12, 22).
 12. A process for manufacturing a semi-conductor structureaccording to claim 1, characterised in that it includes the followingstages: manufacture of the layers of the intermediate zone on one faceof a first substrate intended to supply said semi-conductor surfacelayer and/or on one face of a second substrate intended to supply thesupport substrate of the structure, bonding of the first substrate onthe second substrate, said faces being placed opposite each other,making of said semi-conductor surface layer.
 13. A process according toclaim 12, characterised in that making said semi-conductor surface layerincludes reducing the thickness of the first substrate.
 14. A processaccording to one of the claims 12 or 13, characterised in that bondingthe first substrate onto the second substrate is achieved by molecularadhesion.
 15. A process according to claim 14, characterised in that themanufacturing stage of the layers of the intermediate zone includes thedeposition of at least one bonding layer to allow bonding by molecularadhesion.
 16. A process according to claim 15, characterised in thatsaid bonding layer is a silicon oxide layer.
 17. A process according toany one of claims 12 to 16, characterised in that the first layer is alayer of a material chosen from among polycrystalline silicon depositedby LPCVD, diamond deposited by PECVD, alumina deposited by reactivecathode sputtering, silicon nitride deposited by CVD, aluminium nitridedeposited by CVD, boron nitride deposited by CVD and silicon carbidedeposited by CVD.
 18. A process according to any one of claims 13 to 17,characterised in that the reduction in the thickness of the firstsubstrate (10) is obtained by using one or more technologies from among:rectification, chemical etching, polishing, separation following thermaltreatment along a cleavage plane induced by ion implantation.